Process limitation and device design tradeoffs of self-aligned TiSi/sub 2/ junction formation in submicrometer CMOS devices
- 1 February 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 38 (2) , 246-254
- https://doi.org/10.1109/16.69902
Abstract
No abstract availableKeywords
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