Non-blocking collector InP/GaAs/sub 0.51/Sb/sub 0.49//InP double heterojunction bipolar transistors with a staggered lineup base-collector junction
- 1 April 1999
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 20 (4) , 155-157
- https://doi.org/10.1109/55.753751
Abstract
We have developed lattice-matched InP/GaAs/sub 0.51/Sb/sub 0.49//InP NpN double heterojunction bipolar transistors (DHBTs) which take advantage of the staggered ("type II") band lineup at InP/GaAs/sub 0.51/Sb/sub 0.49/ interfaces: in this system the GaAs/sub 0.51/Sb/sub 0.49/ base conduction band edge lies /spl sim/0.18 eV above the InP collector conduction band, thus enabling the implementation of InP collectors free of the current blocking effect encountered in conventional Ga/sub 0.47/In/sub 0.53/As base DHBTs. The structure results in very low collector current offset voltages, low emitter-base turn-on voltages, and very nearly ideal base and collector current characteristics with junction ideality factors of n/sub B/=1.05 and n/sub c/=1.00. InP/GaAs/sub 0.51/Sb/sub 0.49//InP DHBTs appear well-suited to low-power applications, but can also be used in power applications by virtue of their InP collector. The symmetry of the transistor band structure also lends itself to the potential integration of collector-up and emitter-up devices.Keywords
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