A novel 0.5- mu m n/sup +/-p/sup +/ poly-gated salicide CMOS process
- 1 November 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 36 (11) , 2422-2432
- https://doi.org/10.1109/16.43662
Abstract
No abstract availableKeywords
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