Built-in current testing-feasibility study
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- 6 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
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This publication has 8 references indexed in Scilit:
- Current sensing for built-in testing of CMOS circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Testing oriented analysis of CMOS ICs with opensPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Realistic fault modeling for VLSI testingPublished by Association for Computing Machinery (ACM) ,1987
- Yield Simulation for Integrated CircuitsPublished by Springer Nature ,1987
- Topology dependence of floating gate faults in MOS integrated circuitsElectronics Letters, 1986
- Test Considerations for Gate Oxide Shorts in CMOS ICsIEEE Design & Test of Computers, 1986
- Inductive Fault Analysis of MOS Integrated CircuitsIEEE Design & Test of Computers, 1985
- Testing for Bridging Faults (Shorts) in CMOS CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983