A framework and method for hierarchical test generation

This publication has 16 references indexed in Scilit:

• SPLIT circuit model for test generation
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Hierarchical test generation using precomputed tests for modules
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
• Automated synthesis for testability
  IEEE Transactions on Industrial Electronics, 1989
• A hierarchical approach test vector generation
  Published by Association for Computing Machinery (ACM) ,1987
• Testing Strategy and Technique for Macro-Based Circuits
  IEEE Transactions on Computers, 1985
• On the Acceleration of Test Generation Algorithms
  IEEE Transactions on Computers, 1983
• An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
  IEEE Transactions on Computers, 1981
• Functional Level Primitives in Test Generation
  IEEE Transactions on Computers, 1980
• 9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits
  IEEE Transactions on Computers, 1978
• A Logic System for Fault Test Generation
  IEEE Transactions on Computers, 1976