Hierarchical fault modeling for analog and mixed-signal circuits
- 2 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. cas 31, 96-101
- https://doi.org/10.1109/vtest.1992.232731
Abstract
Presents a comprehensive approach, based on functional error characterization, for modeling faults in analog and mixed-signal circuits. A case study based on a CMOS and an nMOS operational amplifier is discussed, and a full listing of derived behavioral fault models is presented. These fault models are then mapped to the faulty behavior at the macro-circuit level.<>Keywords
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