Carrier Profile Change for Phosphorus-Diffused Layers on Low-Temperature Heat Treatment

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Abstract
The low‐temperature annealing of phosphorus‐diffused layers in silicon is described. The sheet resistance of the diffused layer is found to increase with time at temperatures of 450–800°C. Carrier profiles for slices which have reached an equilibrium value of sheet resistance indicate a substantial decrease in the surface concentration. An Arrhenius plot of this concentration gives a straight line with an activation energy of 0.33 eV. In addition to a decrease in surface concentration, anomalously fast diffusion near the junction causes a significant tail on the profile. A model is presented to account for these results.