Investigation of poly-Si/sub 1-x/Ge/sub x/ for dual-gate CMOS technology
- 1 July 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 19 (7) , 247-249
- https://doi.org/10.1109/55.701432
Abstract
Poly-Si/sub 1-x/Ge/sub x/-gated MOS capacitors were fabricated with x varying from 0 to 0.5. NMOS and PMOS C-V characteristics were measured. Reduced poly-gate depletion effect (PDE) was observed in PMOS devices with increasing Ge mole fraction; while for NMOS, devices with a Ge content /spl sim/20% exhibit the least PDE. Higher active dopant concentration and reduced gate-depletion width for devices featuring less PDE were confirmed. Work function difference (/spl Phi//sub MS/) was found to decrease slightly in N/sup +/ films and significantly in P/sup +/ films as Ge content increases. The shift in /spl Phi//sub MS/ for N/sup +/ poly-Si/sub 1-x/Ge/sub x/ is negligible while it is -0.13 V for P/sup +/Si/sub 0.8/Ge/sub 0.2/ and -0.32 V for P/sup +/Si/sub 0.5/Ge/sub 0.5/. The reduction in energy bandgap (/spl Delta/E/sub g/) was also determined to increase from 0 to 0.26 eV as Ge content increases from 0 to 50%. For deep submicron dual-gate CMOS application, the shift in /spl Phi//sub MS/ should be minimized for low and symmetrical V/sub th/ as well as improved short-channel effect (SCE). A Ge content of /spl sim/20% therefore seems to offer the best tradeoff between SCE and PDE.Keywords
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