Static test sequence compaction based on segment reordering and accelerated vector restoration
- 27 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 12 references indexed in Scilit:
- Combinational profiles of sequential benchmark circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Dynamic test compaction for synchronous sequential circuits using static compaction techniquesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Simulation-based techniques for dynamic test sequence compactionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Methods for dynamic test vector compaction in sequential test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- HITEC: a test generation package for sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Vector restoration based static compaction of test sequences for synchronous sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Sequential circuit test generation using dynamic state traversalPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Acceleration techniques for dynamic vector compactionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Fast static compaction algorithms for sequential circuit test vectorsIEEE Transactions on Computers, 1999
- On static compaction of test sequences for synchronous sequential circuitsPublished by Association for Computing Machinery (ACM) ,1996