Direct-coupled FET logic circuits on InP
- 1 March 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 12 (3) , 98-100
- https://doi.org/10.1109/55.75724
Abstract
A process technology for direct-coupled FET logic (DCFL) circuits on InP substrates, based on enhancement-mode InGaAs/InAlAs heterostructure-insulated-gate FETs (HIGFETs) is discussed. Its performance was demonstrated by fabricating 11- and 19-stage ring oscillators. The circuits were fabricated on undoped lattice-matched heterostructures grown by molecular beam epitaxy (MBE), using a refractory-gate process with self-aligned sidewalls to achieve a lightly-doped-drain (LDD) structure. For a gate length of 1.2 mu m, with V/sub dd/=2 V, the best propagation delay observed was 23 ps/stage, with associated power of 2.2 mW/stage.<>Keywords
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