A four-quadrant CMOS analog multiplier for analog neural networks

This publication has 18 references indexed in Scilit:

• Four-quadrant CMOS analogue multiplier
  Electronics Letters, 1992
• A dynamic CMOS multiplier for analog VLSI based on exponential pulse-decay modulation
  IEEE Journal of Solid-State Circuits, 1991
• A CMOS four-quadrant analog multiplier with single-ended voltage output and improved temperature performance
  IEEE Journal of Solid-State Circuits, 1991
• An MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers
  IEEE Journal of Solid-State Circuits, 1990
• A programmable analog neural network chip
  IEEE Journal of Solid-State Circuits, 1989
• A MOS four-quadrant analog multiplier using the quarter-square technique
  IEEE Journal of Solid-State Circuits, 1987
• A ±5-V CMOS analog multiplier
  IEEE Journal of Solid-State Circuits, 1987
• Wide dynamic range four-quadrant CMOS analog multiplier using linearized transconductance stages
  IEEE Journal of Solid-State Circuits, 1986
• A four-quadrant NMOS analog multiplier
  IEEE Journal of Solid-State Circuits, 1982
• Integrated MOS four-quadrant analogue multiplier using switched-capacitor technique
  Electronics Letters, 1982