Quiescent current analysis and experimentation of defective CMOS circuits
- 1 December 1992
- journal article
- research article
- Published by Springer Nature in Journal of Electronic Testing
- Vol. 3 (4) , 337-348
- https://doi.org/10.1007/bf00135337
Abstract
No abstract availableKeywords
This publication has 12 references indexed in Scilit:
- STUCK FAULT AND CURRENT TESTING COMPARISON USING CMOS CHIP TESTPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- THE BEHAVIOR AND TESTING IMPLICATIONS OF CMOS IC LOGIC GATE OPEN CIRCUITSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- CURRENT VS. LOGIC TESTING OF GATE OXIDE SHORT, FLOATING GATE AND BRIDGING FAILURES IN CMOSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Electrical properties and detection methods for CMOS IC defectsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Testing oriented analysis of CMOS ICs with opensPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Zero defects or zero stuck-at faults-CMOS IC process improvement with I/sub DDQ/Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Analysis and modeling of MOS devices with gate oxide short failuresPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- Modeling of gate oxide shorts in MOS transistorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Topology dependence of floating gate faults in MOS integrated circuitsElectronics Letters, 1986
- Testing for Bridging Faults (Shorts) in CMOS CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983