A 6.5-ns GaAs 20*20-b parallel multiplier with 67-ps gate delay
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 25 (5) , 1226-1231
- https://doi.org/10.1109/4.62146
Abstract
No abstract availableKeywords
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