A 5.1-GHz 1.9-mW GaAs binary frequency divider
- 1 October 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 10 (10) , 440-442
- https://doi.org/10.1109/55.43093
Abstract
A GaAs divide-by-two circuit operating at a clock rate of 5.1 GHz and dissipating only 1.9 mW has been demonstrated. This represents the best room-temperature speed-power performance yet reported for any flip-flop. The D-type flip-flop owes its high performance to a 0.5- mu m TiWN self-aligned gate fabrication process using low-capacitance dielectric material. The speed-power performance with this process is compared to other recent results for high-speed frequency dividers.Keywords
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