Electrical properties of lateral p - n junctions formed on patterned (110) GaAs substrates

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Abstract
We have successfully demonstrated the formation of lateral p - n junctions via single-step Si-doped GaAs MBE growth over patterned (110) GaAs substrates. Current - voltage measurements indicate that the quality of the p - n junctions is position dependent; those located at the lower facet-flat boundary displayed superior rectification properties compared with the upper facet-flat junctions. Analysis of the lower junction forward characteristics revealed two types of current transport, each dominant over separate voltage ranges. Under low applied voltage, electron tunnelling via mid-gap states is proposed as the main mechanism, while diffusion and generation - recombination currents appear to dominate the device characteristics at higher voltages. In contrast, only tunnelling conduction was seen in the forward characteristics of the upper junctions. These effects are interpreted as due to compensated incorporation of Si in the region of the junctions, resulting from strong Ga diffusion from the (110) plane to the (100) surface. Series resistance values for the upper and lower junctions are consistent with this model, as are the dependences on growth temperature.