Trends in megabit DRAM circuit design
- 1 June 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 25 (3) , 778-789
- https://doi.org/10.1109/4.102676
Abstract
No abstract availableThis publication has 36 references indexed in Scilit:
- Trends in megabit DRAM circuit designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A 23ns 1Mbit BiCMOS DRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- Comparison of CMOS and BiCMOS 1-Mbit DRAM performanceIEEE Journal of Solid-State Circuits, 1989
- A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniquesIEEE Journal of Solid-State Circuits, 1989
- Dual-operating-voltage scheme for a single 5-V 16-Mbit DRAMIEEE Journal of Solid-State Circuits, 1988
- An experimental 1-Mbit BiCMOS DRAMIEEE Journal of Solid-State Circuits, 1987
- An experimental 4-Mbit CMOS DRAMIEEE Journal of Solid-State Circuits, 1986
- A 1-Mbit CMOS dynamic RAM with a divided bitline matrix architectureIEEE Journal of Solid-State Circuits, 1985
- A 90ns 1Mb DRAM with multi-bit test modePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Half-V/SUB DD/ bit-line sensing scheme in CMOS DRAMsIEEE Journal of Solid-State Circuits, 1984