Deterministic tests for detecting scrambled pattern-sensitive faults in RAMs
- 19 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 117-122
- https://doi.org/10.1109/mtdt.1995.518092
Abstract
Describes four new test algorithms that detect different classes of physical neighborhood pattern-sensitive faults (PNPSFs) in n/spl times/1 random-access memories (RAMs). All four tests assume that the storage cells are arranged in a rectangular grid. The first two tests assume further that the mapping from logical cell addresses to physical cell locations is known, whereas the second two tests allow the row and column addresses for the square grid to be separately scrambled in any arbitrary way unknown to the tester. The first test has length (97 /sup 5///sub 9/)n and detects all single active PNPSFs. The second test has length 121 /sup 5///sub 9/ and detects all single active, static and passive PNPSFs. The third test has a length of approximately 8.0n(log/sub 2/n)/sup 2/ and detects all single scrambled active PNPSFs. The fourth test has a length of roughly 8.4n(log/sub 2/n)/sup 2.322/ and detects all single scrambled active, static and passive PNPSFs.Keywords
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