The impact of gate-oxide breakdown on SRAM stability
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- 7 November 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 23 (9) , 559-561
- https://doi.org/10.1109/led.2002.802600
Abstract
We have investigated the effects of oxide soft breakdown (SBD) on the stability of CMOS 6T SRAM cells. Gate-to-diffusion leakage currents of 20-50 /spl mu/A at the n-FET source can result in a 50% reduction of noise margin. Breakdown at other locations in the cell may be less deleterious depending on n-FET width. This approach gives targets for tolerable values of leakage caused by gate-oxide breakdown.Keywords
This publication has 8 references indexed in Scilit:
- Reliability projection for ultra-thin oxides at low voltagePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Effects of gate-to-body tunneling current on PD/SOI CMOS SRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Impact of MOSFET oxide breakdown on digital circuit operation and reliabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- The impact of intrinsic device fluctuations on CMOS SRAM cell stabilityIEEE Journal of Solid-State Circuits, 2001
- Reliability: a possible showstopper for oxide thickness scaling?Semiconductor Science and Technology, 2000
- A function-fit model for the soft breakdown failure modeIEEE Electron Device Letters, 1999
- A detailed analysis of CMOS SRAM's with gate oxide short defectsIEEE Journal of Solid-State Circuits, 1997
- Static-noise margin analysis of MOS SRAM cellsIEEE Journal of Solid-State Circuits, 1987